Command line target definition scheme
In Microprobe, the concept target
is used to define where the code being
generated will be run/executed/simulated. Microprobe follows a GCC-like target
definition scheme, where a target is defined by a tuple as following:
<arch-name>-<uarch-name>-<env-name>
where:
<arch-name>: is the name of the architecture.
<uarch-name>: is the name of the microarchitecture.
<env-name>: is the name of the environment and format.
Therefore, possible target definitions could be:
riscv_v22-riscv_generic-riscv64_linux_gcc for RISCV C/asm code.
riscv_v22-riscv_generic-riscv64_test_p for RISCV riscv-tests format.
z13-z13-z64_linuc_gcc for z13 C/asm code.
z14-z14-z64_linux_gcc for z14 C/asm code.
z15-z15-z64_linuc_gcc for z15 C/asm code.
power_v206-power7-ppc64_linux_gcc for POWER7 C/asm code.
power_v207-power8-ppc64_linux_gcc for POWER8 C/asm code.
power_v300-power9-ppc64_linux_gcc for POWER9 C/asm code.
power_v310-power10-ppc64_linux_gcc for POWER10 C/asm code.
Note
Some of the target definitions mentioned above might not be released on the public version of Microprobe but are listed to provide a comprehensive set of examples.
Note
It is up to the user to specify a valid target definition tuple. If an invalid target definition tuple is specified, the results are unpredictable. In the future, we might implement support to check valid target tuple definitions.
Generic tool options
In most of the tools provided, one can use --list-*
options to get the list of
definitions available in the default search paths or the paths specified by the
different --*-paths
options
Flag/Argument |
Description |
---|---|
|
Default search paths for Microprobe target definitions |
|
Search path for architecture definitions. Microprobe will search in these paths for architecture definitions. |
|
Search path for microarchitecture definitions. Microprobe will search in these paths for microarchitecture definitions. |
|
Search path for environment definitions. Microprobe will search in these paths for environment definitions. |
|
Generate a list of architectures available in the defined search paths and exit. |
|
Generate a list of microarchitectures available in the defined search paths and exit. |
|
Generate a list of environments available in the defined search paths and exit. |
Example outputs
Example 1:
Command:
> mp_target --list-architectures
Output:
mp_target.py: INFO: Processing input arguments...
5 isa definitions detected. See table below:
Name:' power_v206', Description:' Power ISA Version 2.06', File:'/tmp/microprobe/targets/power/isa/p-v2_06/isa.yaml'
Name:' power_v207', Description:' Power ISA Version 2.07', File:'/tmp/microprobe/targets/power/isa/p-v2_07/isa.yaml'
Name:' power_v300', Description:' Power ISA Version 3.00', File:'/tmp/microprobe/targets/power/isa/p-v3_00/isa.yaml'
Name:' power_v310', Description:' Power ISA Version 3.10', File:'/tmp/microprobe/targets/power/isa/p-v3_10/isa.yaml'
Name:' riscv_v22', Description:' RISC-V v2.2', File:'/tmp/microprobe/targets/riscv/isa/riscv-v2_2/isa.yaml'
Example 2:
Command:
> mp_target --list-microarchitectures
Output:
mp_target.py: INFO: Processing input arguments...
5 microarchitecture definitions detected. See table below:
Name:' power10', Description:'POWER10 microarchitecture', File:'/tmp/microprobe/targets/power/uarch/p-power10/microarchitecture.yaml'
Name:' power7', Description:' POWER7 microarchitecture', File:'/tmp/microprobe/targets/power/uarch/p-power7/microarchitecture.yaml'
Name:' power8', Description:' POWER8 microarchitecture', File:'/tmp/microprobe/targets/power/uarch/p-power8/microarchitecture.yaml'
Name:' power9', Description:' POWER9 microarchitecture', File:'/tmp/microprobe/targets/power/uarch/p-power9/microarchitecture.yaml'
Name:' riscv_generic', Description:'Generic RISC-V microarchitecture', File:'/tmp/microprobe/targets/riscv/uarch/riscv-generic/microarchitecture.yaml'
Example 3:
Command:
> mp_target --list-environments
Output:
mp_target.py: INFO: Processing input arguments...
8 environment definitions detected. See table below:
Name:' ppc64_linux_gcc', Description:'POWERPC architecture BE (64bit addressing mode), Linux operating system, GCC compiler', File:'/tmp/microprobe/targets/power/env/powerpc64_linux_gcc.py'
Name:' ppc64le_linux_gcc', Description:'POWERPC architecture LE (64bit addressing mode), Linux operating system, GCC compiler', File:'/tmp/microprobe/targets/power/env/powerpc64_linux_gcc.py'
Name:'riscv64_eprocessor_sim', Description:'RISC-V architecture (64bit addressing mode), Linux operating system, GCC compiler', File:'/tmp/microprobe/targets/riscv/env/riscv_eprocessor_sim.py'
Name:' riscv64_linux_gcc', Description:'RISC-V architecture (64bit addressing mode), Linux operating system, GCC compiler', File:'/tmp/microprobe/targets/riscv/env/riscv_linux_gcc.py'
Name:' riscv64_riscy_sim', Description:'RISC-V architecture (64bit addressing mode), Linux operating system, GCC compiler', File:'/tmp/microprobe/targets/riscv/env/riscv_riscy_sim.py'
Name:'riscv64_sargantana_sim', Description:'RISC-V architecture (64bit addressing mode), Linux operating system, GCC compiler', File:'/tmp/microprobe/targets/riscv/env/riscv_sargantana_sim.py'
Name:' riscv64_spike_sim', Description:'RISC-V architecture (64bit addressing mode), Linux operating system, GCC compiler', File:'/tmp/microprobe/targets/riscv/env/riscv_spike_sim.py'
Name:' riscv64_test_p', Description:'RISC-V architecture (64bit addressing mode), Assembly using RISC-V test environment P', File:'/tmp/microprobe/targets/riscv/env/riscv_test_p.py'